This invention relates generally to charge pumps for phase locked loops, and more specifically to a differential input and output charge pump and an associated common mode feedback circuit.
Phase locked loops (PLLs) maintain an output signal in phase relationship to an input signal. Accordingly, PLLs are useful for deriving a clock signal from an incoming digital data stream. Modern digital data communication systems operate at extremely high frequencies at which data bandwidth is at a premium. Providing a clock signal, along with a data signal, inordinately taxes the bandwidth of such systems. Thus, PLLs are used, often as part of a clock recovery unit, to derive a clock signal from incoming data signals.
PLLs generally comprise a phase comparator providing an up signal and a down signal, a charge pump receiving the up signal and down signal, a low pass filter receiving the output of the charge pump, and a voltage or current controlled oscillator. The phase comparator determines if the frequency of the oscillator needs to be increased or decreased. The phase comparator outputs the up signal when the frequency of the oscillator needs to be increased, and outputs the down signal when the frequency of the oscillator needs to be decreased.
The high frequency at which data is communicated in modern data systems, and the need for higher reliability for the transmission of such data, however, places significant requirements and low margins of error on PLLs. One source of errors in PLLs is the charge pump circuitry.
Charge pumps are often comprised of CMOS transistor elements. The CMOS transistor elements often exhibit slight variations in performance due to mechanical manufacturing discrepancies. Such discrepancies often result in variations in the handling of the up and down input signals. Additionally, variations in the power supply used to power or bias the transistor elements also may result in unnecessary variations, or jitter, in the charge pump signal.
One way to improve the performance of a charge pump is to use differential inputs or outputs, as well as to use a feedback circuit based on a common mode signal of the differential outputs. Charge pumps with a differential output utilizing a common mode circuit to reduce fluctuations in the differential outputs are known. Advances in semiconductor device design and manufacturing, however, has resulted in circuitry using decreased voltage levels. Such decreased voltage levels make the use of current sources inside a common mode feedback circuit difficult.